General requirements for PCB circuit board test point production

General requirements for PCB circuit board test point production

Critical components require preset test points on the PCB board. The pads used to solder the external assembly components are not allowed to double as test points, and special test pads must be additionally preset to ensure that solder joint inspection and production debugging are all done. The pads used for testing are arranged as much as possible on the uniform side of the PCB board, and even if detected, it is beneficial to reduce the cost of the inspection.

1. Process preset requirements

(1) The test point interval PCB circuit board edge needs to be greater than 5mm;

(2) The test point shall not be covered by solder resist or text ink;

(3) The best soldering point at the test point or the metal with soft texture, easy to pass, and not easy to oxidize, to ensure that the grounding of the probe is extended and the probe application life is prolonged.

(4) The test point shall be placed 1 mm around the component to stop the probe and component from colliding;

(5) The test point should be placed in the positioning hole (for the precise positioning with the test point, the best non-metallized hole, the positioning hole error should be within ±0.05mm) and the outer circumference of 3.2mm;

(6) The diameter of the test point is not less than 0.4mm, and the spacing between adjacent test points is most fortunately less than 2.54mm, but not less than 1.27mm;

(7) The test surface cannot be placed with components with a height exceeding 6.4 mm. Excessive components will result in poor contact of the test fixture on the test point;

(8) The interval C from the middle of the test point to the edge of the chip component has the following relationship with the SMD height H: SMD height H ≤ 3 mm, C ≥ 2 mm; SMD height H ≥ 3 mm, C ≥ 4 mm.

(9) The size, spacing and layout of the test pad should also match the requirements of the test equipment used.

2. Electrical Preset Requirements (1) Try to pass the SMC/SMD test point of the component surface through the via hole to the soldering surface. The diameter of the via hole is greater than 1mm. It can be tested with a single-sided needle bed to reduce the test cost.

(2) Each electrical contact requires a test point, each IC must have power and ground test points, and as close as possible to the components, the most fortunately within 2.54mm;

(3) When setting the test point on the circuit trace, the width can be enlarged to 1mm;

(4) The test points should be evenly distributed on the PCB to reduce the stress concentration of the probe;

(5) The power supply line on the PCB circuit board should be set to test breakpoints in a sub-area, so that the power supply can be decoupled or hindered from querying. When setting a breakpoint, consider the power carrying capacity after the test breakpoint is restored.

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Q: How do you leave a test point on a PCB board?

Answer: Today's electronic products are becoming lighter and thinner. The pre-set wiring of PCBs is becoming more and more complicated. In addition to the need to coordinate functions and safety, it is also necessary to produce and test. For the requirements of measurability, provide rules for the reference wiring engineer. If you can pay attention to it, you will be able to save a considerable amount of cost for your company and promote the life expectancy of the test and the life of the fixture.

LAYOUT rule

1. Although there are double-sided fixtures, it is best to place the measured points on the uniform surface. It is considered to be a single-sided test.

If there is hardship, the TOP SIZE pin point is less than the BOTTON SIZE.

2. Measuring point priority: I. Test pad II. Component lead III. Via hole --> but not Mask.

3. The distance between the measured point or the measured point and the pre-drilled hole is not less than 1.27mm (50mil). More than 2.54 mm (100 mil) is preferred. Followed by 1.905mm (75mil).

4. The measured point should be at least 2.54mm away from the nearby parts (located in the uniform). If it is a part higher than 3mm, it should be at least 3.05mm apart.

5. The points to be measured should be evenly distributed on the appearance of the PCB to prevent the local density from being too high.

6. The diameter of the measured point is not less than 0.7mm (28mil). If it is on the upper needle plate, the best is not less than 1.00mm. The shape is better in square (round is also available).

7. Empty feet should be testable under the allowable scale. If there is no test point, the point must be pulled.

8. Positioning hole requirements: I. Each PCB must have more than 2 positioning holes, and the holes should not be tinned. (pore size at least 3mm)

II. Select the diagonal line, and the 2 holes that are farthest apart are the positioning holes. (distributed on four sides)

9. Does CAD GERBER FIEL convert to a CAM (FAB-MASTER) compatible program.

10. Screw hole margin TEST-PAD is at least 6mm.

11. Is there a TEST-PAD for each NET?

12. TEST-PAD SIZE tin is not 3mil.

13. The TEST-PAD TO TEST-PAD intermediate point is at least 54 mils apart.

14. TEST-PAD is at least 5mm from the edge of the board.

15. The PAD edge of the SMD CHIP1206 and above parts is at least 100 mils from the TEST-PAD.

16. The PAD edge of the SMD CHIP1206 parts is at least 60 mils from the TEST-PAD.

17. SOIC and TEST-PAD are spaced apart by at least 50 mils in the horizontal direction and at least 35 mils in the straight direction.

18. PCB board thickness should be at least 0.62" (1.35mm). PCBs with thickness less than this value are easy to bend and require special handling.

19. Stop placing the measuring point on the SMT part. Not only can the measurable area be too small to survive, but it can easily damage parts.

20. Stop applying too long part feet (greater than 0.17"; 4.3mm) or excessively large holes (greater than 1.5mm) as the point to be measured.

21. Error from DEVICE UNDER TEST PADS to TEST PADS: 0.05mm

22. The height of the part on the CONDUCT PROBE side is within 6.5 mm.

23. There must be no through holes in the PAD.

24. All NET LISTs must pull TEST POINT instead of VIA HOLE.

25. The IC of IC & CONNECTOR does not apply PIN and must pull out TEST POINT.

26. TEST POINT cannot be LAYed in part BODY and cannot be covered by other components.

27. If the version is advanced, the original TEST-PAD will not change as much as possible, otherwise the fixture will need to be reopened.

28. GUIDE PIN is 2.8∮ or 3.0∮

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Test point production in DXP

● Double-click the via directly to pop up the Via Properties dialog box.

● Testpoint option: used to set vias as a test point, focusing on only the top and bottom vias that can be used as test points.