EMC / EMI Design Tips in PCB Boards

EMC / EMI Design Tips in PCB Boards

With the increasing integration of IC devices, the gradual miniaturization of devices, and the increasing speed of devices, EMI problems in electronic products have become more serious. From the point of view of system equipment EMC / EMI design, handling EMC / EMI issues during the PCB design stage of the equipment is the most effective and lowest cost way to achieve system equipment compliance to electromagnetic compatibility standards. This article introduces EMI control techniques in digital circuit PCB design.

1 Principle of EMI generation and suppression

EMI is caused by electromagnetic interference sources transmitting energy to sensitive systems through coupling paths. It includes three basic forms of conduction through wires or common ground, through space radiation, or through near-field coupling. The harm of EMI is to reduce the quality of the transmitted signal, cause interference or even damage to the circuit or equipment, making the equipment unable to meet the technical specifications required by the electromagnetic compatibility standard.

 In order to suppress EMI, the EMI design of digital circuits should be carried out according to the following principles:

● According to the relevant EMC / EMI technical specifications, the indicators are decomposed into single-board circuits for hierarchical control.

● Control from the three elements of EMI: interference source, energy coupling path and sensitive system, so that the circuit has a flat frequency response, ensuring that the circuit is normal and stable.

● Start with the front-end design of the equipment, pay attention to EMC / EMI design, and reduce design costs.

2 EMI control technology for digital circuit PCB

When dealing with various forms of EMI, specific issues must be analyzed. In the PCB design of digital circuits, EMI control can be performed from the following aspects.

2.1 Device Selection

When designing EMI, we must first consider the speed of the selected device. In any circuit, if the device with a rise time of 5ns is replaced with a device with a rise time of 2.5ns, the EMI will increase about 4 times. The radiation intensity of EMI is directly proportional to the square of the frequency. The highest EMI frequency (fknee) is also called the EMI emission bandwidth. It is a function of signal rise time instead of signal frequency: fknee = 0.35 / Tr (where Tr is the signal rise time of the device. )

The frequency range of this radiation type EMI is 30MHz to several GHz. In this frequency band, the wavelength is very short, and even very short wiring on the circuit board may become a transmitting antenna. When EMI is high, the circuit is prone to lose normal functions. Therefore, in the device selection, under the premise of ensuring the circuit performance requirements, low-speed chips should be used as much as possible, and appropriate driving / receiving circuits should be used. In addition, the lead pins of the device have parasitic inductance and parasitic capacitance. Therefore, in high-speed designs, the impact of the device packaging form on the signal can not be ignored, because it is also an important factor that generates EMI radiation. Generally, the parasitic parameters of a chip device are smaller than those of a plug-in device, and the parasitic parameters of a BGA package are smaller than those of a QFP package.

2.2 Connector selection and signal terminal definition

The connector is the key link of high-speed signal transmission and also the weak link that is prone to EMI. You can arrange more ground pins on the terminal design of the connector to reduce the distance between the signal and ground, reduce the effective signal loop area that generates radiation in the connector, and provide a low-impedance return path. When necessary, consider isolating some critical signals with ground pins.

2.3 stacked design

Under the premise of cost allowance, increasing the number of ground layers and placing the signal layer next to the ground plane layer can reduce EMI radiation. For high-speed PCBs, the power and ground planes are coupled in close proximity, which reduces the power impedance and thus reduces EMI.

2.4 Layout

According to the signal current flow, a reasonable layout can reduce the interference between signals. Proper layout is the key to controlling EMI. The basic principles of the layout are:

● Analog signals are susceptible to interference from digital signals, and analog circuits should be separated from digital circuits;

● The clock line is the main source of interference and radiation. Keep it away from sensitive circuits and keep the clock traces short.

● Large current and high power consumption circuits should be avoided in the center of the board as much as possible, and the influence of heat dissipation and radiation should be considered at the same time;

● The connector should be arranged on one side of the board as far as possible, and away from high-frequency circuits;

● The input / output circuit is close to the corresponding connector, and the decoupling capacitor is close to the corresponding power pin;

● Fully consider the feasibility of power division by layout. Multi-power devices should be placed across the boundary of the power division area to effectively reduce the impact of planar division on EMI;

● The return plane (path) is not divided.

2.5 Wiring

● Impedance control: High-speed signal lines will exhibit the characteristics of transmission lines. Impedance control is required to avoid signal reflection, overshoot and ringing, and reduce EMI radiation.

● Classify the signals and separate the interference source from the sensitive system as much as possible to reduce the coupling according to the EMI radiation intensity and sensitivity of different signals (analog signal, clock signal, I / O signal, bus, power supply, etc.).

● Strictly control the trace length, via number, cross-segment, termination, wiring layer, reflow path, etc. of clock signals (especially high-speed clock signals).

● The signal loop, that is, the loop formed by the signal flowing out to the signal flowing in, is the key to EMI control in PCB design and must be controlled during wiring. To understand the flow of each key signal, route the key signals close to the return path to ensure that the loop area is minimized.

For low-frequency signals, the current should flow through the path with the least resistance; for high-frequency signals, high-frequency current should flow through the path with the least inductance, not the path with the least resistance (see Figure 1). For differential mode radiation, the EMI radiation intensity (E) is proportional to the current, the area of the current loop, and the square of the frequency. (Where I is the current, A is the loop area, f is the frequency, r is the distance to the center of the loop, and k is a constant.)

When the minimum inductance return path is just below the signal wire, the current loop area can be reduced, thereby reducing EMI radiation energy.

● The key signal must not cross the divided area.

● Tightly couple the high-speed differential signal traces as much as possible.

● Make sure the stripline, microstrip line and its reference plane meet the requirements.

● The lead of the decoupling capacitor should be short and wide.

● All signal traces should be kept as far away from the edge of the board as possible.

● For a multi-point connection network, choose a suitable topology to reduce signal reflection and EMI radiation.

2.6 Segmentation of power plane

● Dividing the power layer

  When there is one or more sub-power supplies on one main power supply plane, it is necessary to ensure the continuity of each power supply area and sufficient copper foil width. The dividing line does not need to be too wide, generally a line width of 20 to 50 mil is sufficient to reduce the gap radiation.

● Segmentation of the ground layer

The ground plane should be kept intact and avoid division. If division is necessary, distinguish between digital, analog, and noise grounds, and connect the external ground through a common ground point at the exit.

In order to reduce the edge radiation of the power supply, the power / ground plane should follow the 20H design principle, that is, the ground plane size is 20H larger than the power plane size (see Figure 2), so that the fringe field radiation intensity can be reduced by 70%

3 Other EMI control methods

3.1 Power System Design

● Design a low-impedance power system to ensure that the impedance of the power distribution system in the frequency range below fknee is lower than the target impedance.

● Use a filter to control conducted interference.

● Power supply decoupling. In the EMI design, provide reasonable decoupling capacitors, which can make the chip work reliably, and reduce high-frequency noise in the power supply, reducing EMI. Due to the influence of wire inductance and other parasitic parameters, the response speed of the power supply and its power supply wires is slow, which will cause the instantaneous current required by the driver in high-speed circuits to be insufficient. Reasonably design the bypass or decoupling capacitors and the distributed capacitance of the power layer. Before the power supply responds, the capacitor's energy storage effect can be used to quickly provide the device with current. Proper capacitor decoupling can provide a low-impedance power path, which is key to reducing common-mode EMI.

3.2 Ground

The grounding design is the key to reducing the overall board EMI.

● Make sure to use single-point grounding, multi-point grounding, or hybrid grounding.

● Separate digital ground, analog ground and noise ground, and determine a suitable common ground point.

● If there is no ground wire layer in the double-panel design, it is important to design the ground wire grid reasonably. The width of the ground wire》 power line width》 signal line width should be guaranteed. Large-area paving can also be used, but pay attention to the continuity of large-area ground on the same floor.

● For multi-layer board design, ensure that there is a ground plane layer to reduce common ground impedance.

3.3 Damping resistor in series

On the premise that the circuit timing requirements allow, the basic technology for suppressing interference sources is to insert a small resistance resistor in series at the key signal output end, usually a 22 to 33 ohm resistor. These output small resistors in series can slow the rise / fall time and smooth the overshoot and undershoot signals, thereby reducing the high-frequency harmonic amplitude of the output waveform and effectively suppressing EMI.

3.4 Shield

● Key components can use EMI shielding materials or shielding nets.

● The shielding of key signals can be designed as a strip line or separated by ground wires on both sides of the key signal.

3.5 Spread Spectrum

The method of spread spectrum (spread spectrum) is a new effective method to reduce EMI. Spread spectrum is the modulation of a signal to spread the signal energy over a relatively wide frequency range. In fact, this method is a controlled modulation of the clock signal, and this method does not significantly increase the jitter of the clock signal. The practical application proves that the spread spectrum technology is effective and can reduce the radiation by 7 to 20dB.

3.6 EMI analysis and test

● Simulation Analysis

After the PCB wiring is completed, you can use EM I simulation software and expert system to perform simulation analysis and simulate the EMC / EMI environment to evaluate whether the product meets the requirements of relevant electromagnetic compatibility standards.

● Scan test

Use an electromagnetic radiation scanner to scan the panel after assembly and power-on to obtain the electromagnetic field distribution diagram in the PCB (as shown in Figure 3, the red, green, and cyan white areas indicate the low to high electromagnetic radiation energy), according to the test The result is improved PCB design.

4 Summary

With the continuous development and application of new high-speed chips, the signal frequency is getting higher and higher, and the PCB board carrying them may be getting smaller and smaller. PCB design will face more severe EMI challenges. Only by continuous exploration and innovation can the PCB / board EMC / EMI design be successful.