About impedance matching of high speed PCB design From China Manufacture

About impedance matching of high-speed PCB design

Impedance matching means that during energy transmission, the load impedance must be equal to the characteristic impedance of the transmission line. At this time, the transmission will not cause reflection, which means that all the energy is absorbed by the load. Conversely, there is energy loss in transmission. In high-speed PCB design, whether the impedance is matched is related to the quality of the signal.

When do PCB traces need to be impedance matched?

Do not mainly look at the frequency, but the key is to look at the steepness of the edge of the signal, that is, the rise / fall time of the signal. It is generally believed that if the rise / fall time of the signal (according to 10% ~ 90%) is less than 6 times the wire delay, it is high speed For signals, you must pay attention to the problem of impedance matching. The wire delay is generally 150ps / inch.

Characteristic impedance

During the propagation of a signal along a transmission line, if the signal propagation speed is uniform throughout the transmission line and the capacitance per unit length is the same, then the signal always sees a completely uniform instantaneous impedance during the propagation process. Since the impedance of the entire transmission line remains constant, we give a specific name to indicate this characteristic or characteristic of a specific transmission line, which is called the characteristic impedance of the transmission line. Characteristic impedance refers to the value of the instantaneous impedance seen by the signal when the signal propagates along the transmission line. The characteristic impedance is related to the layer where the PCB wire is located, the material (dielectric constant) used by the PCB, the width of the trace, and the distance between the wire and the plane, and has nothing to do with the length of the trace. The characteristic impedance can be calculated using software. In high-speed PCB wiring, the impedance of digital signal traces is generally designed to be 50 ohms, which is an approximate figure. Generally, the coaxial cable baseband is 50 ohms, the frequency band is 75 ohms, and the twisted pair (differential) is 100 ohms.

Common impedance matching methods

1. Series terminal matching

Under the condition that the impedance of the signal source is lower than the characteristic impedance of the transmission line, a resistor R is connected in series between the source of the signal and the transmission line to match the output impedance of the source with the characteristic impedance of the transmission line and suppress the signal reflected from the load The reflection occurs again.

Matching resistance selection principle: the sum of the matching resistance value and the output impedance of the driver is equal to the characteristic impedance of the transmission line. The output impedance of common CMOS and TTL drivers changes with the level of the signal. Therefore, for a TTL or CMOS circuit, it is impossible to have a very correct matching resistance, which can only be compromised. The signal network with a chain topology is not suitable for series terminal matching. All loads must be connected to the end of the transmission line.

Series matching is the most commonly used terminal matching method. Its advantage is that the power consumption is small, it will not bring extra DC load to the driver, nor will it introduce additional impedance between the signal and ground, and only requires one resistive element. Common applications: impedance matching of general CMOS and TTL circuits. The USB signal is also sampled in this way for impedance matching.

2. Parallel terminal matching

When the impedance of the signal source is very small, the input impedance of the load end is matched with the characteristic impedance of the transmission line by increasing the parallel resistance to achieve the purpose of eliminating the reflection at the load end. The realization form is divided into two forms of single resistance and double resistance.

Matching resistance selection principle: when the input impedance of the chip is high, for the single resistance form, the parallel resistance value of the load end must be close to or equal to the characteristic impedance of the transmission line; for the double resistance form, each parallel resistance value It is twice the characteristic impedance of the transmission line.

The advantages of parallel terminal matching are simple and easy to implement, and the obvious disadvantage is that it will bring DC power consumption: the DC power consumption of the single resistance mode is closely related to the duty cycle of the signal; the dual resistance mode no matter whether the signal is high or low All have DC power consumption, but the current is half less than the single resistance method.

Common applications: More applications with high-speed signals.

(1) SSTL drivers such as DDR and DDR2. A single resistor is used, connected in parallel to VTT (generally half of IOVDD). The parallel matching resistance of the DDR2 data signal is built into the chip.

(2) High-speed serial data interface such as TMDS. It adopts the form of single resistance, connected in parallel to IOVDD at the receiving device end, and the single-ended impedance is 50 ohms (100 ohms between differential pairs).