High-speed (>100MHz) high-density PCB design skills sharing

High-speed (>100MHz) high-density PCB design skills sharing

When the size of the circuit board is fixed, if the design needs to accommodate more functions, it is often necessary to increase the trace density of the PCB, but this may lead to increased mutual interference of the traces, and at the same time, the traces are too thin to reduce the impedance. , ask experts to introduce the skills in high-speed (>100MHz) high-density PCB design?

When designing high-speed and high-density PCBs, crosstalk interference is indeed a special concern because it has a great impact on timing (TIming) and signal integrity (signal integrity). Here are a few points to note:

1. Control the continuity and matching of the characteristic impedance of the trace.

2. The size of the trace spacing. The most commonly seen spacing is twice the line width. The impact of trace spacing on timing and signal integrity can be known through simulation, and the minimum spacing tolerable can be found. Results may vary from chip to chip signal.

3. Select the appropriate termination method.

4. Avoid the routing directions of the upper and lower adjacent layers in the same direction, and even if the traces are just overlapped up and down, because this crosstalk is larger than that of the adjacent routing on the same layer.

5. Use blind/buried vias to increase the trace area. But the production cost of the PCB board will increase. It is indeed difficult to achieve complete parallelism and equal length in actual implementation, but it is still necessary to try to achieve it. In addition, differential and common-mode terminations can be reserved to mitigate the impact on timing and signal integrity.